1. Field of the Invention
This invention relates to digital-to-analog converters (DACs) and more particularly to gradient error cancellation associated with digital-to-analog converters.
2. Description of the Related Art
One problem with DACs is that gradients in the integrated circuit due to, e.g., process or temperature can impact the accuracy of the DAC. For example, referring to FIG. 1A, a power amplifier 101 that generates heat adjacent to a DAC 102 in an integrated circuit 103 may cause a temperature gradient in the integrated circuit as shown in FIG. 1B. For simplicity, in the figure it is assumed that the temperature decreases linearly as distance from the heat source increases as illustrated by line 105. While a linear temperature gradient is shown, threshold voltage or other parameters may also increase or decrease across the device that can be approximated by a linear gradient (first order) or quadratic (second order) or even higher order gradients. Calibration of the DAC can be used to address such gradients, but such calibration typically requires complex circuitry and additional space that can be undesirable for certain DAC applications.
Therefore, it would be desirable to resolve gradient issues using device placement patterns and intrinsic device characteristics.